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Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed.
The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA.
Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed.
The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA.
Preface. List of Figures. List of Tables.- 1: Introduction. 1. Motivation of the Work. 2. Organisation of the Book.- 2: Traditional xDSL Line Drivers. 1. Broadband Communication Technology. 2. The Channel. 3. Modulation Techniques. 4. Driving the Line. 5. Solutions for xDSL Line Drivers. 6. Conclusions.- 3: Describing Function Analysis. 1. Non-linear Systems. 2. The Describing Function Method. 3. Conclusions.- 4: Behavioural Modelling of the SOPA. 1. Reference Model. 2. Zeroth Order SOPAs. 3. Higher Order SOPA Amplifiers. 4. Final Remarks and Conclusions.- 5: Design Plan and CAD Tools. 1. Design Plan Synthesis. 2. CAD-tools to Support the Design Methodology. 3. Conclusions.- 6: Realisations in Mainstream CMOS. 1. A Zeroth Order SOPA. 2. A Third Order SOPA in .35 mum CMOS. 3. Conclusions.- 7: Conclusions. 1. The Objectives. Glossary. Appendices.- A: Stability Analysis of the Coupled SOPA. 1. Stability Criterion. 2. Polar Form of the Coupled Open Loop Transfer Function. 3. Calculation of the Stability Conditions.- References.- Index.
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